6.4.10.1 Video Refresh Counter Register
The contents of this register is used to store the interval between refresh reads.
Each VRAM must be accessed within an 8-ms interval. There are 512 VRAM
rows, and the clock used for the refresh count is the video shift clock or 1/4
multiple of the video oscillator frequency. The refresh count is
(8 ms / 512) *
((1/interleave) * video oscillator)
.
Note
Value at initialization: 0
The register’s format and contents are:
0010 0931
MR−0093−93RAGS
RESERVED VIDEO COUNT
6.4.10.2 Video Base Address Register
The register is used to store the base row address for the starting scan line at
initialization and on vertical retrace.
Note
Value at initialization: 0
The register’s format is:
0009 0831
MR−0094−93RAGS
RESERVED VIDEO BASE ROW ADDRESS
CXTurbo Graphics Subsystem: 300/500 Models 6–17
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